Zilog Z16C35 Instrukcja Użytkownika Pobierz pdf (Strona 146)

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User Manual

UM011002-0808

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Figure 5–63. Receive DMA Count Registers

5.6.10 Transmit DMA Count Registers A, B

There are two sets of Transmit DMA Count Registers, one set for Transmit DMA Channel

A and one set for Transmit DMA Channel B. Each register set contains two registers, one

for the low byte (bits 7-0) and one for the high byte (bits 15-8) as shown in Figure 5-35.

These registers are read write.

(A) LSB

Address: 01000 (Low Byte)

D6D7

D5 D4 D3 D2 D1 D0

Rx A Cnt0

Rx A Cnt1

Rx A Cnt2

Rx A Cnt3

Rx A Cnt4

Rx A Cnt5

Rx A Cnt6

Rx A Cnt7

(B) MSB

Address: 01001 (High Byte)

D6D7

D5 D4 D3 D2 D1 D0

Rx A Cnt8

Rx A Cnt9

Rx A Cnt10

Rx A Cnt11

Rx A Cnt12

Rx A Cnt13

Rx A Cnt14

Rx A Cnt15

(A) LSB

Address: 01100 (Low Byte)

D6D7

D5 D4 D3 D2 D1 D0

Rx B Cnt0

Rx B Cnt1

Rx B Cnt2

Rx B Cnt3

Rx B Cnt4

Rx B Cnt5

Rx B Cnt6

Rx B Cnt7

(B) MSB

Address: 01101 (High Byte)

D6D7 D5 D4 D3 D2 D1 D0

Rx B Cnt8

Rx B Cnt9

Rx B Cnt10

Rx B Cnt11

Rx B Cnt12

Rx B Cnt13

Rx B Cnt14

Rx B Cnt15

Receive DMA Count Register Channel A

Receive DMA Count Register Channel B

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