Zilog Z16C30 Instrukcja Użytkownika Pobierz pdf (Strona 145)

7-17

Z16C30 USC

USER'S MANUAL

ZILOG

UM97USC0100

Start: Interrupt with

Vector = "Rx Data"

CT=0?

Clear the RD IP bit

(write 90

to DCCR7-0)

Yes

Read Status

from RCSR.

Handle bits other

than RxBound

as required.

CT=0?

IF NECESSARY,

write 0101 to

RCmd (RCSR15-12)

Read FIFO count

CT: = RICR15-8

Read FIFO count

CT: = RICR15-8

Yes

Clear the RD IUS bit

(write 90

to DCCR15-8)

Return from

Interrupt

Read & store byte

or word from RDR.

Decrement CT by

1 or 2 accordingly

Read & store last

byte/word from RDR.

Decrement CT by

1 or 2 accordingly

End of Frame?

RxBound

(RCSR4) = 1

Yes

Read RCSR15-8

or RCSR15-0, to

clear latched status

Perform End of

Frame processing

(switch buffers etc.)

Figure 7-11. A Sample Service Routine for Receive Data Interrupts

UM009402-0201

1 2 ... 140 141 142 143 144 145 146 147 148 149 150 ... 207 208

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