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eZ80F91 Modular Development Kit

User Manual

UM017010-0112 eZ80F91 Module Operational Description

2. Ensure that R14 is in place.

3. Connect the negative (–) battery lead to GND.

4. Connect the positive (+) battery lead to J10.

On-Chip Flash Memory

The eZ80F91 MCU on the eZ80F91 Module features 256 KB of on-chip

Flash memory, which can be programmed a single byte at a time, or in

bursts of up to 256 bytes. Write operations can be performed using either

memory or I/O instructions. Erasing bytes in Flash memory returns them

to a value of

FFh. Both the MASS ERASE and PAGE ERASE operations

are self-timed by the Flash controller, leaving the CPU free to execute

other operations in parallel. Upon power-up, on-chip Flash memory is

located in the address range

000000h-03FFFFh. Four wait states are

programmed in Flash Control Register

F8h.

On-chip Flash memory is prioritized over all external chip selects, can be

enabled or disabled (power-on enabled), and can be programmed within

any 256 KB address space in the 16 MB address range.

The eZ80F91 Module features the following memory configurations:

•

8 KB on-chip SRAM

•

128 KB off-chip SRAM

•

256 KB on-chip Flash

To learn more about the programming of internal Flash memory, refer to

the e

Z80F91 ASSP Product Specification (PS0270).

External Flash Memory

The eZ80F91 MDS Adapter Board provides a footprint for 2 MB of exter-

nal Flash memory. The eZ80F91 Mini Enet Module supports this external

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